|
Model number |
W-99100-2S1P |
|
Chipset |
ASIX/AX99100 |
|
Port number |
2* Serial port,1*Parallel port |
|
Interface |
PCI Express 1x slot |
|
Dimension |
65.4*60*14.5mm |
|
Support OS |
Windows®10(32/64), 8 / 8.1 (32/64), 7 (32/64), Vista(32/64), XP(32/64), 2000 Windows Server® 2012, 2008 R2, 2003(32/64) Mac OS® 10.x (Intel based, tested up to 10.9) Linux 2.4.x and later (Tested up to 3.5) |
|
Environment |
Operating Temperature: 0 ℃-50 ℃ |
|
Relative Humidity: 10%-90%(non-condensing) |
|
|
Storage Temperature: -0℃-80℃ |
|
|
Relative Humidity: 5%-90%(non-condensing) |
3、 Chipset Description :
The AX99100 is a single chip solution that fully integrates PCIe 2.0 Gen 1 end-point controller and SerDes with a
variety of peripherals such as four High Speed Serial Ports, one Parallel Port, I²C Master, High Speed SPI, Local Bus
(ISA-Like) , and GPIOs. It consists of four main configurations such as 4S (PCIe to Quad Serial), 2S+1P (PCIe to Dual
Serial and Single Parallel), 2S+SPI (PCIe to Dual Serial and SPI), and LB (PCIe to Local Bus/ISA-Like) for different kinds
of applications.
The AX99100, in 68-pin QFN, are available with RoHS compliant package and supports commercial grade
Feature:
·
PCI Express
o Single-lane (X1) PCI Express End-point Controller with PHY integrated
o Compliant with PCI Express 2.0 Gen 1
o Compliant with PCI Express card specifications
o Compliant with PCI Power Management 1.2
o Supports four PCI Express functions
o Supports both legacy and MSI Interrupt
o Supports ASPM Power Management
· Serial Port Interface
o Dual or Quad UARTs
o Supports RS-232/RS-422/RS-485 multiprotocol
o Bi-directional speeds up to 25 Mbps per port
o Full Serial Modem Control
o Supports Hardware, Software Flow Control
o Supports 5, 6, 7, 8 and 9-bit Serial format
o Supports Even, Odd, None, Space and Mark parity
o Supports Custom baud rate by internal PLL or external clock
o Supports On Chip 256 Byte depth FIFOs in Transmit, Receive path of each Serial Port
o Supports remote wakeup and power management features
o Serial Port transceiver shutdown support
o Supports Slow IrDA mode (up to 115200bps) on all Serial Ports
o Supports multi-drop application for 9-bit mode
o Supports DMA burst transfer
·
Parallel Port
o Compatible with IEEE 1284 – SPP/Byte/ECP Mode
· SPI Interface
o Programmable SPI clock frequency up to 42MHz
o Supports Mode 0, Mode 1, Mode 2 and Mode 3 timing modes
o Supports MSB/LSB first transfer fashion
o Programmable peripheral chip select, selecting up to 7 SPI devices
o Supports Non-Burst-Type transfer up to 8 bytes and/or Burst-Type transfer via DMA mode for high
performance
o Supports to fragment large data block into several smaller transfers on SPI bus to reduce software
loading5
o Supports programmable transfer 0 ~ 8 bytes OP-Code field in each transfer automatically to reduce
software loading
o Supports wake-up by SWAKEn pin from Slave
·
Local Bus Interface
o Supports memory or I/O access through PCIe BAR0/1 to local bus interface, each BAR mapping to
local bus\' chip select (CS0n and CS1n)
o Supports direct access and bus master access (auto-increment and fixed address)
o Supports 8-bit or 16-bit data bus width (little and big endian bus swap)
o Supports up to 2 Kbytes address space and 2 chip select outputs when separated address/data bus
style
o Supports up to 64 Kbytes address space and 2 chip select outputs when multiplexed address/data
bus style
o Supports programmable local chip select region
o Supports “Slave Request based DMA” access for interfacing with external device with bus master
o Supports clock out, CLKO, up to 62.5MHz
o Supports asynchronous or synchronous Local Bus with required clock output, CLKO
o Supports programmable bus access cycles, self-terminated bus access cycles and back-to-back
turnaround cycles
o Supports programmable RSTO, ALE, RDY, DREQ0/1, DACK0/1, CLKO polarity, and INT0/1 level/edge
trigger
o Supports wake-up by INT0/1 and DREQ0/1 pins
· Supports I²C Master Interface
·
Up to 24 bi-directional GPIO lines including 8 dedicated GPIO and 16 multi-function GPIO
·
Integrates on-chip power-on reset circuit
·
On Chip 3.3 to 1.2V Regulator
·
68-pin QFN RoHS compliant package
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